Cathodoluminescence as a technique for inspection, metrology, and failure analysis of microLED processing

Introduction

Light-emitting diodes (LEDs) represent a significant portion of semiconductor devices currently in production and are preferred for most lighting applications, including room lights and display technologies like smartphones, high definition televisions, and augmented reality headsets. LEDs have ~10% higher efficiency and ~3x longer lifetime than compact fluorescent light bulbs; furthermore, the devices are small, fast, and directly addressable.

The manufacturing process of μLEDs and other semiconductor devices can have several hundred steps and last for many weeks. Therefore, it is imperative to analyze and determine the viability of devices during fabrication to avoid processing defective devices further and to perform failure analysis (FA) to optimize processing steps to improve the throughput of future batches. A simplified workflow for wafer-mounted μLEDs is shown in Figure 2.

Despite the need to increase μLED device yield, there is a lack of non-destructive techniques for defect identification that can be used in between production steps to identify (e.g.) electrical shorts, handling defects, dielectric layer faults, or semiconductor composition metrology. However, the announcement of the Monarc^® cathodoluminescence (CL) detector for scanning electron microscopes (SEMs) looks set to change that, offering luminescence characterization from 6" wafer level to the nanoscale. The Monarc detector also provides the most accurate correlation with other signals. This capability allows topographical, compositional, and crystallographic information to be captured simultaneously, thus greatly enhancing failure analysis capabilities.

Methods

CL—the light emitted from a sample excited with energetic electrons—has demonstrated significant value in the compound semiconductor industry in process development and device characterization and is a valuable tool in analyzing dielectric materials. This spectroscopic analysis allows for material identification that is not easily determined by conventional optical or SEM analysis[1]. A key advantage of CL performed in an electron microscope is that the nanometer-sized analysis spot can be used for full-wafer inspection (and metrology) to the nanoscale characterization of individual microLEDs.

Energy dispersive spectroscopy (EDS) in the SEM is a key technique in analytical sciences to determine the elemental composition with microscopic spatial resolution. The use of the EDS technique in failure analysis (FA) is ideal as it provides analyses of the energy distribution of x-rays emitted from a sample, from which the distribution of elements may be determined.

Results and discussion

In this work, we analyzed commercially manufactured GaN-In_xGa_1-xN multiple quanta well (MQW) based miniLEDs fabricated on a 4-inch sapphire substrate using the Gatan Monarc CL and EDAX Octane Elite EDS systems, both attached to an FE-SEM. Each rectangular LED (Figure 5) consisted of a stack of materials grown and selectively etched in sequence, including – from the bottom up – a thin AlN buffer layer, ~2 μm of n-GaN, ~2 μm of Si-doped N+-GaN, 200 nm of MQW layers, 300 nm of Mg-doped P-GaN, 100 nm of indium tin oxide (ITO), coated with ~300 nm of SiO₂ and metal contacts.

While the SEM image is excellent for displaying surface morphology, it lacks information regarding the consistency of LED material distribution and defects. CL imaging was used to analyze LED devices and revealed several defects used for FA to evaluate handling induced damage, fabrication defects, and material composition.

Handling-induced defect

Secondary electron and unfiltered CL images were captured over a large area (~16 mm²) (Figure 6). The CL image revealed ~1% of LEDs exhibit low brightness, a defect that was not apparent from the corresponding SEM images. The affected devices were in an 'X' pattern that did not correspond to the device column and row pattern and likely caused by mishandling during the fabrication process. These defective devices were investigated to determine the defect's source and whether the devices remain viable for implementation.

A CL spectrum image (hyperspectral map) was captured for one of the defected LEDs (yellow box) and is presented in Figure 7. The CL maps suggest a surface influence primarily affecting the MQW layer emission, a mechanical scratch, introduced after the MQW but before metal deposition.

These defects have likely compromised the electrical pathways and would significantly reduce or circumvent LED light emission, and they should be rejected from further processing. CL allows us to determine which devices are compromised and generate a map that can be used to selectively exclude defected devices from further processing. Defects such as these can lead to the exclusion of large regions of wafer area, supporting dozens of devices, and are generally the most avoidable as they originate from human interactions, e.g., during wafer transport or exchange between instruments during processing.

Electrical defect

Defects that affect the electrical connections in LEDs can be influential across an entire array and lead to packaged device performance degradation. The most common electrical defects include open circuit and short circuit.

LEDs were observed with missing metal contact pads and are presented in Figure 8, which leads to a device that may behave electrically as an open circuit. The missing contact pads were easily located due to the bright regions in the CL image where the metal layers should have been. Due to the absence of the cladding layers, the CL brightness was 2.5x brighter than areas with cladding.

An LED with an electrical short defect was revealed and is presented in Figure 9. These sorts of defects are fatal as they prevent proper LED functionality and can lead to power loss. The shadow cast by the contacting material demonstrates a bright to dark contrast ratio of up to 7:1 with the surrounding region, while for the secondary electron image, the contrast ratio is only 2:1.

Discovering electrical short defects is drastically simplified by observing CL images. The enhanced contrast provided by the CL map enables more robust automatic failure detection algorithms to be designed with a consequent increase in device yield.

Fabrication defects

CL mapping also revealed several other defects, including fabrication defects near the upper and lower device contacts, as shown in Figure 10. In this case, CL did not provide an unambiguous explanation as to the nature of the defect. EDS mapping and CL imaging were performed simultaneously to determine the type of defect. The EDS maps, shown in Figure 10, revealed local deficiencies in silicon and oxygen and excess in gallium for the defects indicated by the red box resulting from SiO₂ being unintentionally removed during one of the liftoff processing steps; other areas (green box) revealed an excess of SiO₂.

Material composition

The CL image (Figure 11 (left)), however, demonstrated a very strong emission intensity revealing some variation across the surface of the LED, which was not covered by opaque metal layers. A spectrum image (Figure 11 (center)) was captured and colorized to reveal variance in the indium-fraction distribution of the LED MQW. Figure 11 (center) is comprised of three bandpass images that were extracted from the spectrum image, colorized, and stacked together. The blue intensity represents emission at 430 nm, while red comes from 460 nm and the green at 360 nm, each with a 20 nm bandwidth. This composite bandpass image reveals regions where the red intensity is reduced, indicating lower concentrations of indium locally by about 0.4% less than the 16.2% (In) average; this variance is not significant enough to be rejected from further processing. Spectra extracted from the spectrum image, (red) from the MQW and (blue, x10) from the GaN region, are presented in Figure 11 (right) and demonstrated a very strong intensity near 450 nm corresponding to the InGaN emission and the GaN at 365 nm.

Summary and conclusions

Semiconductor device production requires a significant amount of time and resources; therefore, metrology and inspection are imperative to ensure resource allocation is not wasted on defective devices. CL with supplementary EDS provides invaluable inspection techniques for direct observation of many types of defects, leading to a significant degradation in the device performance. Furthermore, CL has the capacity to image layers below the surface, allows for the determination of defect impact by measuring device intensity, and supports the development of more robust defect identification algorithms based on enhanced contrast. EDS demonstrates the capacity to discern types of defects by determination of the elemental composition of the defected regions.